The present invention relates to flash memories and, more particularly, to methods for reading such memories more reliably.
Originally, flash memories stored only one bit per cell. Flash memories that store two bits per cell now are available commercially, and flash memories that store more than two bits per cell are being developed. Flash memories that store one bit per cell are called “Single Level Cell” (SLC) memories. Flash memories that store more than one bit per cell are called “Multi Level Cell” (MLC) memories.
FIG. 1 illustrates how a bit pattern of three bits is stored in a MLC memory that is capable of storing three bits per cell.
The threshold voltage of a flash cell is in a range, called the “voltage window”, from a minimum value Vmin to a maximum value Vmax. For historical reasons, writing data to a flash cell is called “programming” the flash cell. This is done by applying voltage pulses to the cell, to inject electrons from the cell's silicon substrate through the cell's oxide layer into the cell's floating gate, until the threshold voltage of the cell is high enough within the voltage window to represent the desired bit pattern. In a three-bit-per-cell memory, the voltage window is divided into eight voltage bands: from Vmin to V1, from V1 to V2, from V2 to V3, from V3 to V4, from V4 to V5, from V5 to V6, from V6 to V7 and from V7 to Vmax. A threshold voltage within one of the voltage bands represents a bit pattern as shown in FIG. 1: a threshold voltage between Vmin and V1 represents the bit pattern “111”, a threshold voltage between V1 and V2 represents the bit pattern “110”, etc. In general, the voltage window of a m-bit-per-cell memory is divided into 2m voltage bands.
To read a flash cell, the threshold voltage of the flash cell is compared to the reference voltages that define the voltage bands. In the case of some flash memories (hereinafter called “type 1” memories), reading a cell that stores a bit pattern of m bits requires m such comparisons. For example, when m=3, as illustrated n FIG. 1, the threshold voltage first is compared to V4. Depending on the outcome of that comparison, the threshold voltage is compared to either V2 or V6. Depending on the outcome of the second comparison, the threshold voltage is compared to either V1 or V3 or V5 or V7. Note that this comparison does not assume prior knowledge of the threshold voltage: circuitry in the flash memory returns a signal indicating whether the threshold voltage is higher or lower than the reference voltage to which it is being compared.
In the case of some other flash memories (hereinafter called “type 2 memories”), the threshold values of all the cells that are read collectively are compared to all 2m−1 reference voltages between Vmin and Vmax.
In a collection of flash cells, the threshold voltages of the cells are distributed statistically around the centers of their respective voltage bands. FIG. 1 shows the threshold voltages in the first voltage band distributed according to a distribution curve 10, the threshold voltages in the second voltage band distributed according to a distribution curve 12, the threshold voltages in the third voltage band distributed according to a distribution curve 14, the threshold voltages in the fourth voltage band distributed according to a distribution curve 16, the threshold voltages in the fifth band distributed according to a distribution curve 18, the threshold voltages in the sixth band distributed according to a distribution curve 20, the threshold voltages in the seventh band distributed according to a distribution curve 22 and the threshold voltages in the eighth band distributed according to a distribution curve 24. There are several reasons for the finite widths of these distributions:
1. The programming process is a stochastic one that relies on inherently stochastic processes such as quantum mechanical tunneling and hot injection.
2. The precision of the read/program circuitry is finite and is limited by random noise.
3. In some flash technologies, the threshold voltage of a cell being read is affected by the threshold voltages of neighboring cells.
4. Chip-to-chip variations and variations in the manufacturing process cause some cells to behave differently than other cells when read/programmed.
In addition, the threshold voltage distributions tend to change over time, as follows:
1. As a flash memory is programmed and erased, the voltage window tends to shrink and the voltage bands become biased. These phenomena limit the number of times a MLC flash memory can be erased and re-programmed.
2. The threshold voltage of a flash cell that is not programmed for a long time tends to drift downward. This phenomenon limits the time that data can be reliably retained in a flash memory.
The voltage bands of a flash cell should be designed to be wide enough to accommodate all these phenomena, but not too wide. A voltage band that is too narrow, relative to the associated threshold voltage distribution curve and relative to the drift of that curve over time, leads to an unacceptably high bit error rate. Making the voltage bands very wide relative to the associated threshold voltage distributions limits the number of bits in the bit patterns that can be stored in the flash cell. In practice, flash memories are designed to have one error per 1014-1016 bits read. Some flash technologies are unable to achieve this error rate while storing the desired number of bits per cell. Some flash memories based on such technology use error correction circuits to compensate for their high intrinsic error rates. Some NAND flash manufacturers have instructed their customers to incorporate error-correcting code in their applications.
There is thus a widely recognized need for, and it would be highly advantageous to have, methods of reading flash cells that are more reliable than those known in the art.
Definitions
Reference voltages, such as the reference voltages illustrated in FIG. 1, that demark the boundaries of the voltage bands inside the voltage window, are termed “integral reference voltages” herein. The present invention introduces reference voltages that lie within voltage bands; such reference voltages are termed “fractional reference voltages” herein. Note that the voltages that define the voltage window itself (Vmin and Vmax in FIG. 1) are not considered reference voltages herein.
A bit pattern that has more than one bit has a least significant bit and a most significant bit. A bit pattern that has more than two bits has bits of different significance between the least significant bit and the most significant bit. In a bit pattern of m bits, the least significant bit is termed herein the bit of “significance level 0”, the next-to-least significant bit is termed herein the bit of “significance level 1”, etc., until the most significant bit is termed herein the bit of “significance level m−1”.
Bits of one or more bit patterns also are grouped herein in “significance groups” that include bits of one or more significance levels. A significance group is a group of bits of consecutive significance levels. Like the significance levels of the bits of a bit pattern, the significance groups of the bits of one or more bit patterns are ordered from a least significant bit group to a most significant bit group. For example, the bits of three-bit bit patterns can be grouped into bit groups in four different ways. The first way is to form three bit groups: one bit group with the least significant bits (the bits of significance level 0), one bit group with the next-to-least significant bits (the bits of significance level 1), and one bit group with the most significant bits. The second way is to form two bit groups: one bit group with the least significant bits and one group with the bits of significance levels 1 and 2. The third way is to form two bit groups: one bit group with the bits of significance levels 0 and 1 and one bit group with the most significant bits. The fourth way is to treat the entire set of bit patterns as a single bit group.